Model Checking Tools for Parallelizing Compilers

In this paper we apply temporal logic and model checking to analyze the structure of a source program represented as a process graph. The nodes of this graph are sequential processes whose computations are speciied as transition systems; the edges are dependence ((ow and control) relations between the computations at the nodes. This process graph is used as an intermediate source program representation by a parallelizing compiler. By labeling the nodes and the edges of the process graph with descriptive atomic propositions and by specifying the conditions necessary for optimizations and parallelizations as temporal logic formulas, we can use a model checker to locate nodes and sub-graphs of the process graph where particular optimizations can be made. We illustrate this technique by showing how a parallelizing compiler can determine if the iterations of an enumerated loop can be executed concurrently. To add or modify optimizations in this parallelizing compiler, we need only specify their conditions as temporal logic formulas. We do not need to add or modify compiler code. This greatly simpliies the process of locating optimization and parallelization opportunities in the source program and makes it easier to experiment with complex optimizations. Hence, this methodology provides a convenient, concise, and formal framework to carry out program optimizations by compilers under the control of programmers.